A three phase 3-level inverter with reduced THD factor

Authors

  • J. Iwaszkiewicz Author
  • A. Muc Author

DOI:

https://doi.org/10.24084/repqj16.465

Keywords:

THD factor, cascaded inverters, NPC inverters

Abstract

The paper presents an mathematical analysis of a stepped function denoted as fN=6 . This function describes precisely an output voltage waveform of a 3-level inverter. The analysis proves that cascaded inverters give a very good performance of the output voltage according to a criterion of minimal THD. Optimal parameters are indicated in the paper. They permit to diminish the THD factor to a level below 21% while in standard NPC inverters such a result requires special treatment.

Author Biographies

  • J. Iwaszkiewicz

    Department of Electrical Engineering 
    Gdynia Maritime University 
    81-87 Morska St., 81-225 Gdynia (Poland) 

  • A. Muc

    Department of Electrical Engineering 
    Gdynia Maritime University 
    81-87 Morska St., 81-225 Gdynia (Poland) 

Published

2024-01-24

Issue

Section

Articles