Tools for Assessing the Robustness of Electrical System against Voltage Dips in terms of Amplitude, Duration and Frequency

Authors

  • P. Caramia Author
  • P. Varilone Author
  • P.Verde Author
  • L. Vitale Author

DOI:

https://doi.org/10.24084/repqj12.275

Keywords:

Index Terms, Power Quality, Voltage Dip

Abstract

The method of fault position is useful for characterizing power-system performance in the presence of voltage dips due to faults. It is based on short-circuit simulations repeated for all the system nodes and for many points along the system lines: fault voltages that are below a preset threshold are the required voltage dips. These dips are stored in so-called dip matrices, which contain only the dips in all the system nodes when faults occur at points along the lines. Graphical presentation of dip matrices has been proposed as a valuable tool to ascertain the critical area for system performance; this graphical visualization immediately correlates dip severity in terms of amplitude with colours defined by a proper scale. This paper proposes a new graphical representation of the During Fault Voltage matrices that allow accounting for also the dip frequency that is a very important aspect for assessing the voltage dip severity. New robustness indices are also proposed to synthesize bus performance in terms of affected and exposed areas able to account for not only the amplitude of the residual voltage but also the frequency. All the concepts are introduced and illustrated with reference to a real distribution systems.

Author Biographies

  • P. Caramia

    Dept of Engineering, University of Napoli Parthenope Centro Direzionale di Napoli, Isola C4 – 80143 Naples, Italy

  • P. Varilone

    Dept of Electrical and Information Engineering, University of Cassino e del Lazio Meridionale 
    Via G. Di Biasio, 43, 03043 Cassino, Italia

  • P.Verde

    Dept of Electrical and Information Engineering, University of Cassino e del Lazio Meridionale 
    Via G. Di Biasio, 43, 03043 Cassino, Italia  

  • L. Vitale

    Dept of Electrical and Information Engineering, University of Cassino e del Lazio Meridionale 
    Via G. Di Biasio, 43, 03043 Cassino, Italia 

Published

2024-01-24

Issue

Section

Articles