Selective Harmonics Elimination PWM with Self-Balancing DC-link Capacitors in Five-Level Inverter

Authors

  • K. Imarazene Author
  • H. Chekireb Author
  • E.M. Berkouk Author

DOI:

https://doi.org/10.24084/repqj09.281

Abstract

In this paper it is shown that the make use of the redundant states with selective harmonics elimination PWM in the case of multilevel inverters is possible so as to produce the required fundamental voltage while at the same time not generate higher order harmonics and balance the four dc voltage sources without additional circuitry.

Author Biographies

  • K. Imarazene

    Laboratoire des Systèmes Electriques et industriels,

    U.S.T.H.B University, Algeria,

    e-mail: khimarazene@yahoo.fr

  • H. Chekireb

    Laboratoire de Commande des Processus. Département de Génie Electrique.

    ENP School, Algeria

    chekireb@yahoo.fr

  • E.M. Berkouk

    Laboratoire de Commande des Processus. Département de Génie Electrique.

    ENP School, Algeria

    emberkouk@yahoo.fr

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Published

2024-01-17

Issue

Section

Articles