Selective Harmonics Elimination PWM with Self-Balancing DC-link Capacitors in Five-Level Inverter
DOI:
https://doi.org/10.24084/repqj09.281Abstract
In this paper it is shown that the make use of the redundant states with selective harmonics elimination PWM in the case of multilevel inverters is possible so as to produce the required fundamental voltage while at the same time not generate higher order harmonics and balance the four dc voltage sources without additional circuitry.